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 SC185
POWER MANAGEMENT Features

4A Synchronous Step-Down Regulator
Description
The SC185 is a 4A synchronous step-down regulator designed to operate with an input voltage range of 2.9V to 5.5V. The device requires only three external filter components for a complete a step down regulator solution. The output voltage is factory predetermined with an available range of 1.0V to 3.3V. The SC185 is optimized for maximum efficiency over a wide range of load currents. During full load operation, the SC185 operates in PWM mode with fixed 1.5MHz oscillator frequency, allowing the use of small surface mount external components. As the load decreases, the regulator has the option to transition into Power Save mode maintaining high efficiency or stay in forced PWM mode operation. The SC185 offers output short circuit and thermal protection to safe guard the device under extreme operating conditions. The enable pin provides on/off control of the regulator. When connected to logic low, the device enters shutdown and consumes less than 1uA of current. Other protection features include programmable soft start with Power Good indicator, over voltage protection and under voltage lockout. The SC185 is available in a thermally-enhanced, 3mm x 3mm x 0.6mm MLPQ-UT16 package and has a rated temperature range of -40 to +85C.
VIN Range: 2.9 - 5.5V VOUT Options: 1.0V to 3.3V Up to 4A Output Current Ultra-Small Footprint, <1mm Height Solution 1.5MHz Switching Frequency Optional Power Save Mode Operation Efficiency Up to 95% Low Output Noise Across Load Range Excellent Transient Response Start Up into Pre-Bias Output 100% Duty-Cycle Low Dropout Operation <1A Shutdown Current Externally Programmable Soft Start Time Power Good indicator Input Under-Voltage Lockout Output Over-Voltage, Current Limit Protection Over-Temperature Protection 3mm x 3mm x 0.6mm thermally enhanced MLPQ-UT16 package -40 to +85C Temperature Range Pb-free, Halogen free, and RoHS/WEEE compliant
Fixed VOUT version
Applications

Desktop Computing Set-Top Box LCD TV Network Cards Printer
Typical Application Circuit
VIN CIN 22F R1 1 C1 0.1F PGOOD Enable Mode CSS
7 6 5 9 1,2
PVIN
LX
14,15,16
L, 1.0H VOUT 1.5V COUT 47F
SC185H
4
AVIN VOUT PGOOD EN MODE SS PGND AGND
11,12,13,T 3 10
June 18, 2010
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SC185
Pin Configuration
LX PGND LX LX
Ordering Information
Device
SC185xULTRT(2)(3)(4) SC185xEVB(5)
12 11 10
Package
3mm x 3mm x 0.6mm MLPQ-UT16 Evaluation Board
16
15
14
13
PVIN PVIN AGND AVIN
1 2 3 4 5
TOP VIEW
PGND PGND VOUT SS
T
9 7 8
6
Notes: (1) Calculated from package in still air, mounted to 3" x 4.5", 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards. (2) Available in tape and reel only. A reel contains 3,000 devices. (3) Device is Pb-free, Halogen free, and RoHS/WEEE compliant. (4) "x" is the code of the output voltage. See Table 1 for the code. For example, the device number for VOUT= 1.50V is SC185HULTRT. (5) "x" is the code of the output voltage. See Table 1 for the code. For example, the EVB with VOUT= 1.50V is SC185HEVB.
3mm x 3mm x 0.6mm MLPQ-UT16 JA = 40C/W (1); JC = 7C/W
PGOOD
MODE
NC
EN
Marking Information
Table 1: Available Output Voltages
Code B VOUT(6) 1.00 1.20 1.50 1.80 2.50 3.30
185x
E H J L Q
nnnn
yyww
Notes: (6) Contact factory for alternative output voltage options.
Marking for 3mm x 3mm MLPQ-UT 16 Lead Package: x = Code of the output voltage (Example: H for VOUT=1.50V) yyww = Datecode (Example: 0852) nnnn = Semtech Lot number (Example: E901)
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SC185
Absolute Maximum Ratings
PVIN and AVIN Supply Voltages ..................... -0.3 to 6.0V LX Voltage(9) ........................ -0.3 to PVIN+0.3V, 6V Max VOUT Voltage ................................. -0.3 to AVIN+0.3V CTLx pins Voltages ........................... -0.3 to AVIN+0.3V Peak IR Reflow Temperature ............................... 260C ESD Protection Level(8) ........................................ 3kV
Recommended Operating Conditions
Supply Voltage PVIN and AVIN ........................ 2.9 to 5.5V
Maximum Output Current ....................................... 4.0A
Temperature Range ................................. -40 to +85C Input Capacitor ................................................ 22uF Output Capacitor Output Inductor ........................... 47uF (or 2 x 22uF) ............................................. 1.0uH
Thermal Information
Thermal Resistance, Junction to Ambient(7) ............ 40 C/W Thermal Resistance, Junction to Case ............... 7 C/W Maximum Junction Temperature ........................ +150C Storage Temperature Range ..................... -65 to +150 C
Exceeding the absolute maximum ratings may result in permanent damage to the device and/or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not recommended.
Notes: (7) Calculated from package in still air, mounted to 3" x 4.5", 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards. (8) Tested according to JEDEC standard JESD22-A114-B. (9) Due to parasitic board inductance, the transient LX pin voltage at the point of measurement may appear larger than that which exists on silicon. The device is designed to tolerate the short duration transient voltages that will appear on the LX pin due to the deadtime diode conduction, for inductor currents up to the current limit setting of the device.
Electrical Characteristics
Unless specified: PVIN= AVIN= 5.0V, VOUT= 1.50V, CIN= 22F, COUT= 2 x 22F; L= 1.0H; -40C TJ +125 C; Unless otherwise noted typical values are TA= +25 C.
Parameter
Under-Voltage Lockout Output Voltage Tolerance(10) Current Limit Supply Current Shutdown Current High Side Switch Resistance(11) Low Side Switch Resistance(11) LX Leakage Current(11) Load Regulation Oscillator Frequency Soft-Start Charging Current(11) Foldback Holding Current
Symbol
UVLO
Conditions
Rising AVIN, PVIN=AVIN Hysteresis
Min
2.70
Typ
2.80 300
Max
2.90
Units
V mV
VOUT ILIMIT IQ ISHDN RDSON_P RDSON_N ILK(LX) VLOAD-REG fOSC ISS ICL_HOLD
PVIN= AVIN= 2.9 - 5.5V; IOUT=0A Peak LX current No load, MODE= High No load, MODE= Low EN= AGND ILX= 100mA, TJ= 25 C ILX= -100mA, TJ= 25 C PVIN= AVIN= 5.5V; LX= 0V; EN= AGND PVIN= AVIN= 5.5V; LX= 5.0V; EN= AGND PVIN= AVIN= 5.0V, MODE=Hi, IOUT=1mA - 4A
-1.25 5.0 6.0 12 100 1 50 35 1 -20 -1 0.3 1.275 1.5 +5
+1.25 7.0
% A mA A
10
A m
10
A %
1.725
MHz A A
Average LX Current
1
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SC185
Electrical Characteristics (continued)
Parameter
Impedence of PGOOD Low PGOOD Threshold PGOOD Delay EN Delay EN Input Current(11) EN Input High Threshold EN Input Low Threshold MODE Input Current(11) MODE Input High Threshold MODE Input Low Threshold VOUT Over Voltage Protection Thermal Shutdown Temperature Thermal Shutdown Hysteresis
Symbol
RPGOOD_LO VPG_TH VPG_DLY tEN_DLY IEN_ VEN_HI VEN_LO IMODE_ VMODE_HI VMODE_LO VOVP TSD TSD_HYS
Conditions
Min
Typ
10
Max
Units
% ms s s
VOUT rising Asserted PGOOD= Low From EN Input High to SS starts rising EN =AVIN or AGND -2.0 1.2
90 2 20 50 2.0
A V
0.4 MODE= AVIN or AGND -2.0 1.2 0.4 110 115 160 10 120 2.0
V A V V % C C
Notes: (10) The "Output Voltage Tolerance" includes output voltage accuracy, voltage drift over temperature and the line regulation. (11) A negative current means the current flows into the pin and a positive current means the current flows out from the pin.
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SC185
Pin Descriptions
Pin #
1,2 3 4
Pin Name
PVIN AGND AVIN
Pin Function
Input supply voltage for the converter power stage. Ground connection for the internal circuitry. AGND needs to be connected to PGND directly. Power supply for the internal circuitry. AVIN is required to be connected to PVIN through an R-C filter of 1 and 100nF. MODE select pin. When connected to logic high, the device operates in forced PWM mode. When connected to logic low, it operates normally with PSAVE mode at light load. The enable pin has a 500k internal pulldown resistor. This resistor is switched in circuit whenever the MODE pin is "Low" or when the part is in undervoltage lockout. Enable pin. When connected to logic high or tied to AVIN pin, the SC185 is on. When connected to logic low, the device enters shutdown and consumes less than 1A current (typ.). The enable pin has a 500k internal pulldown resistor. This resistor is switched in circuit whenever the EN is "Low" or when the part is in undervoltage lockout. Power good indicator. When the output voltage reaches the PGOOD threshold, this pin will be open-drain (After the PGOOD delay), otherwise, it is pulled low internally. No connection. Soft Start. Connect a soft-start capacitor to program the soft start time. There is a 5A charging current flowing out of the pin. Output voltage sense pin. Ground connection for converter power stage. Switching node - connect an inductor between this pin and the output capacitor. Thermal pad for heatsinking purposes. Recommend to connect it to PGND. It is not connected internally.
5
MODE
6
EN
7 8 9 10 11,12,13 14,15,16 T
PGOOD NC SS VOUT PGND LX Thermal Pad
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SC185
Block Diagram
AVIN PGOOD
4 UVLO 7
Power Good Logic & Delay
1 2
PVIN
Faults 0.45V
AGND
3
-
+
PGood Comp. 14 15 16
0.575V
LX
-
+
VOUT
10 OVP Comp.
Control Logic & MOSFET Drivers
5A
+ + SS
9 Faults 0.5V
-PWM
Error Amp.
+
11 12 13
PGND
PWM Comp.
Oscillator & Ramp 5
EN
6
BANDGAP
MODE
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SC185
Typical Characteristics
Circuit Conditions: CIN= 22uF/6.3V, COUT= 2 x 22uF/6.3V, CSS= 10nF. Unless otherwise noted, L= 1.0uH (TOKO: FDV0530S-1R0).
Efficiency Efficiency PWM) (Forced
100%
Efficiency (PSAVE Enabled)
100% 95% 90%
VIN=5.0V;VOUT=3.3V
95% 90%
Vin = 5V, Vout = 3.3V
Vin = 3.3V, Vout = 1.5V Vin = 5V, Vout = 1.5V
Efficiency (%)
Efficiency (%)
85% 80% 75% 70% 65% 60% 0.0 0.5 1.0 1.5 2.0 2.5 Output Current (A) 3.0 3.5 4.0
85% 80% 75% 70%
VIN=5.0V;VOUT=1.5V VIN=3.3V;VOUT=1.5V
TA= 25 C
65% 60%
TA = 25oC
0.0
0.1 1.0 Output Current (A)
10.0
Total Loss Total Loss (Forced PWM) 2000
0.60%
Load Regulation (Forced PWM)
0.50% 0.40% 0.30%
TA = 25oC
TA=25 C
1600
VIN=3.3V;VOUT=1.5V
Load Regulation
0.20% 0.10% 0.00% -0.10% -0.20% -0.30% -0.40%
Loss (mW)
1200
Vin = 5.0V, Vout = 3.3V
VIN=5.0V;VOUT=3.3V
800
Vin = 3.3V, Vout = 1.5V
Vin = 5V, Vout = 1.5V
400
VIN=5.0V;VOUT=1.5V
0 0.0 0.5 1.0 1.5 2.0 2.5 Output Current (A) 3.0 3.5 4.0
-0.50% -0.60% 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
Output current (A)
RDS(ON)RDSON (P & N) Variation over Line Variation vs. Input Voltage
35% 30% 25% 20% 20% 15% 10%
RDSON (P & N) Variation Over Temperature RDS(ON) Variation vs. Temperature
VIN= 5.0V ILX= 100mA
P-Channel
5%
Variation
15% 10% 5% 0% -5% -10% 2.5 3.0 3.5 4.0 Input Voltage (V) 4.5 5.0 5.5
Variation
0% -5% -10%
P-Channel
ILX= 100mA TA= 25 C
N-Channel
-15% -20% -40 -15
N-Channel
10
35
60
85
Ambient Temperature ( C)
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SC185
Typical Waveforms
Circuit Conditions: CIN= 22uF/6.3V, COUT= 2 x 22uF/6.3V, CSS= 10nF. Unless otherwise noted, L= 1.0uH (TOKO: FDV0530S-1R0).
Output Voltage Ripple (VOUT=1.5V), PSAVE Mode
Mode= Low Ch3 VOUT
Output Voltage Ripple (VIN=3.3V, VOUT=1.5V, 0A)-Auto
Output Voltage Ripple (VOUT=1.5V),PSAVE Mode
Mode= Low Ch3 VOUT
Output Voltage Ripple (VIN=5.0V, VOUT=1.5V, 0A)-Auto
Ch4 VIN Ch2 ILX Ch1 VLX
Ch4 VIN Ch2 ILX Ch1 VLX
VIN = 3.3V IOUT = 0A
VIN = 5.0V IOUT = 0A
Output Voltage Ripple (VOUT=1.5V), Forced PWM
Mode= Hi Ch3 VOUT
Output Voltage Ripple (VIN=3.3V, VOUT=1.5V, 0A)-PWM
Output Voltage Ripple (VOUT=1.5V), Forced PWM
Mode= Hi Ch3 VOUT
Output Voltage Ripple (VIN=5.0V, VOUT=1.5V, 0A)-PWM
Ch4 VIN Ch2 ILX Ch1 VLX
Ch4 VIN Ch2 ILX Ch1 VLX
VIN = 3.3V IOUT = 0A
VIN = 5.0V IOUT = 0A
Output Voltage Ripple (VOUT=1.5V) @ Full Load
Ch3 VOUT
Output Voltage Ripple (VIN=3.3V, VOUT=1.5V, 4A)-All
Output Voltage Ripple (VOUT=1.5V) @ Full Load
Ch3 VOUT
Output Voltage Ripple (VIN=5.0V, VOUT=1.5V, 4A)-All
Ch4 VIN Ch2 ILX Ch1 VLX
Ch4 VIN Ch2 ILX Ch1 VLX
VIN = 3.3V IOUT = 4A
VIN = 5.0V IOUT = 4A
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SC185
Typical Waveforms (continued)
Circuit Conditions: CIN= 22uF/6.3V, COUT= 2 x 22uF/6.3V, CSS= 10nF. Unless otherwise noted, L= 1.0uH (TOKO: FDV0530S-1R0).
Output Voltage Ripple (VOUT=3.3V), PSAVE Mode
Mode= Low Ch3 VOUT
Output Voltage Ripple (VIN=5.0V, VOUT=3.3V, 0A)-Auto
Output Voltage Ripple (VOUT=3.3V), forced PWM
Mode= Hi Ch3 VOUT
Output Voltage Ripple (VIN=5.0V, VOUT=3.3V, 0A)-PWM
Ch4 VIN Ch2 ILX Ch1 VLX
Ch4 VIN Ch2 ILX Ch1 VLX
VIN = 5.0V IOUT = 0A
VIN = 5.0V IOUT = 0A
Output Voltage Ripple (VOUT=3.3V) @ Full Load
Ch3 VOUT
Output Voltage Ripple (VIN=5.0V, VOUT=3.3V, 4A)-All
Start Up (Enable) (VOUT=1.5V), PSAVE Mode
Ch1:VEN Ch2: IOUT Ch3: VOUT Ch4: PGood
Start-up (VIN=5.0V, VOUT=1.5V, 0A)-Auto
Mode= Low
Ch4 VIN Ch2 ILX Ch1 VLX
VIN = 5.0V IOUT = 4A
VIN = 5.0V IOUT = 0A
Start Up (Enable) (VOUT=1.5V), forced PWM
Ch1:VEN Ch2: IOUT Ch3: VOUT Ch4: PGood
Start-up (VIN=5.0V, VOUT=1.5V, 0A)-PWM
Start Up (Enable) (VOUT=1.5V) @Full Load
Ch1:VEN Ch2: IOUT Ch3: VOUT Ch4: PGood
Start-up (VIN=5.0V, VOUT=1.5V, 4A)-All
Mode= Hi
VIN = 5.0V IOUT = 0A
VIN = 5.0V IOUT = 4A
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SC185
Typical Waveforms (continued)
Circuit Conditions: CIN= 22uF/6.3V, COUT= 2 x 22uF/6.3V, CSS= 10nF. Unless otherwise noted, L= 1.0uH (TOKO: FDV0530S-1R0).
Start Up (Enable) (VOUT=3.3V), PSAVE Mode
Ch1:VEN Ch2: IOUT Ch3: VOUT Ch4: PGood
Start-up (VIN=5.0V, VOUT=3.3V, 0A)-Auto
Start Up (Enable) (VOUT=3.3V), forced PWM
Ch1:VEN Ch2: IOUT Ch3: VOUT Ch4: PGood
Start-up (VIN=5.0V, VOUT=3.3V, 0A)-PWM
Mode= Low
Mode= Hi
VIN = 5.0V IOUT = 0A
VIN = 5.0V IOUT = 0A
Start Up (Enable) (VOUT=3.3V) @Full Load
Ch1:VEN Ch2: IOUT Ch3: VOUT Ch4: PGood
Start-up (VIN=5.0V, VOUT=3.3V, 4A)-All
Start-up into Pre-biased Output (VIN=5.0V, VOUT=1.5V, 0A)-PWM
Start Up into Pre-Biased Output (VOUT=1.5V)
Ch1:VEN Ch2: IOUT Ch3: VOUT Ch4: PGood Mode= Hi
540mV
VIN = 5.0V IOUT = 4A
VIN = 5.0V IOUT = 0A
Start-up into Pre-biased Output (VIN=5.0V, VOUT=3.3V, 0A)-PWM
Start Up into Pre-Biased Output (VOUT=3.3V)
Ch1:VEN Ch2: IOUT Ch3: VOUT Ch4: PGood Mode= Hi
Start-Up into Shorted Output (VIN=5.0V, VOUT=1.5V)-PWM
Start Up (Enable) into Output Short Circuit
Mode= Hi
Ch1 VLX
Ch3 VOUT 480mV Ch4 VSS Ch2 ILX
VIN = 5.0V IOUT = 0A
VIN = 5.0V ROUT = 0
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SC185
Typical Waveforms (continued)
Circuit Conditions: CIN= 22uF/6.3V, COUT= 2 x 22uF/6.3V, CSS= 10nF. Unless otherwise noted, L= 1.0uH (TOKO: FDV0530S-1R0).
Output Short-Circuit (VIN=5.0V, VOUT=1.5V)-PWM
Output Short Circuit (VOUT=1.5V)
Recovery from Output Short (VIN=5.0V, VOUT=1.5V)-PWM
Recovery from OCP (VOUT=1.5V)
Mode= Hi
Mode= Hi
Ch1 VLX
Ch1 VLX
Ch3 VOUT Ch4 PGood Ch2 ILX
Ch3 VOUT Ch4 VIN Ch2 ILX
VIN = 5.0V
VIN = 5.0V IOUT = 0A
Output Short-Circuit (VIN=5.0V, VOUT=3.3V)-PWM
Output Short Circuit (VOUT=3.3V)
Recovery from Output Short (VIN=5.0V, VOUT=3.3V)-PWM
Recovery from OCP (VOUT=3.3V)
Mode= Hi
Mode= Hi
Ch1 VLX
Ch1 VLX
Ch3 VOUT Ch4 PGood Ch2 ILX
Ch3 VOUT Ch4 VIN Ch2 ILX
VIN = 5.0V
VIN = 5.0V IOUT = 0A
Transient Response (VIN=5.0V, VOUT=1.5V)-PWM@CCDL
Transient Response (VOUT=1.5V, ISTEP=2A)
Transient Response (VOUT=3.3V, ISTEP=2A)
Transient Response (VIN=5.0V, VOUT=3.3V)-PWM@CCDL
Mode= Hi
Mode= Hi
Ch3 VOUT
Ch3 VOUT
Ch2 IOUT
Ch2 IOUT
VIN = 5.0V IOUT = 1A to 3A to 1A
VIN = 5.0V IOUT = 1A to 3A to 1A
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SC185
Typical Waveforms (continued)
Circuit Conditions: CIN= 22uF/6.3V, COUT= 2 x 22uF/6.3V, CSS= 10nF. Unless otherwise noted, L= 1.0uH (TOKO: FDV0530S-1R0).
Transient Response (VOUT=1.5V, ISTEP=3A)-PSAVE Enabled
Transient Response (VOUT=3.3V, ISTEP=3A)-PSAVE Enabled
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SC185
Applications Information
Detailed Description
The SC185 is a synchronous step-down Pulse Width Modulated (PWM), DC-DC converter utilizing a 1.5MHz fixed-frequency voltage mode architecture. The device is designed to operate in fixed-frequency PWM mode and has the option to enter power save mode (PSAVE) at light loads to maximize efficiency. The switching frequency is chosen to minimize the size of the external inductor and capacitors while maintaining high efficiency. frequency being much lower than the PWM mode frequency. If the output load current increases enough to cause VOUT to decrease below the PSAVE exit threshold (VOUT 4%), the device automatically exits PSAVE and operates in continuous PWM mode. Note that the PSAVE high and low threshold levels are both set at or above VOUT to minimize undershoot when the SC185 exits PSAVE. Figure 1 illustrates the transitions from PWM mode to PSAVE mode and back to PWM mode.
Operation
During normal operation, the PMOS MOSFET is activated on each rising edge of the internal oscillator. The period is set by the onboard oscillator when in PWM mode. The device has an internal synchronous NMOS rectifier and does not require a Schottky diode on the LX pin. The device operates as a buck converter in PWM mode with a fixed frequency of 1.5MHz at medium to high loads. At light loads, depending on the MODE pin configuration, the part will either enter PSAVE mode to maximize efficiency or stay in forced PWM mode.
Load Demand (IOUT)
VVOUT +2% OUT +2.5%
OFF
VOUT
Power Save Mode Operation
Connect the MODE pin to ground to enable the PSAVE mode. When the load current decreases below the PSAVE threshold, PWM switching stops and the device automatically enters PSAVE mode. This threshold varies depending on the input voltage and output voltage setting, optimizing efficiency for all possible load currents - whether in PWM or PSAVE mode. While in PSAVE mode, output voltage regulation is controlled by a series of bursts in switching. During a burst, the inductor current is limited to a peak value which controls the on-time of the PMOS switch. After reaching this peak, the PMOS switch is disabled and the inductor current is forced to near 0mA. Switching bursts continue until the output voltage climbs to VOUT +2% or until the PSAVE current limit is reached. Switching is then stopped to eliminate switching losses, enhancing overall efficiency. Switching resumes when the output voltage reaches the lower threshold of VOUT and continues until the upper threshold again is reached. Note that the output voltage is regulated hysterically while in PSAVE mode between VOUT and VOUT + 2%. The period and duty cycle while in PSAVE mode are solely determined by VIN and VOUT until PWM mode resumes. This can result in the switching
VOUT -2% VOUT - 4%
BURST
VLX
PWM Mode at Medium/High Load PSAVE Mode at Light Load
PSAVE EXIT PWM Mode at Medium/High Load
Time
Figure 1 -- Transitions between PWM and PSAVE Modes
Protection Features
The SC185 provides the following protection features: Current Limit Over-Voltage Protection Soft-Start Operation Thermal Shutdown
* * * *
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SC185
Applications Information (continued)
Current Limit & OCP
The internal PMOS power device in the switching stage is protected by a current limit feature. If the inductor current is above the PMOS current limit for 16 consecutive cycles, the part enters foldback current limit mode and the output current is limited to the current limit holding current (ICL_HOLD) which is approximately 900mA. Under this condition, the output voltage will be the product of ICL_HOLD and the load resistance. When the load presented falls below the current limit holding level, the output will charge to the upper PSAVE voltage threshold and return to normal operation. The SC185 is capable of sustaining an indefinite short circuit without damage. During the soft start, if current limit has occurred before the SS voltage has reached 400mV, the part enters foldback current limit mode. Foldback current limit mode will be disabled during soft-start after the SS voltage is higher than 400mV. output. When the output is pre-charged by another supply rail, the SC185 will not discharge the output during the soft start period.
Shut Down
When the EN pin is low, the SC185 will run in shutdown mode, drawing less than 1A (typ.) from the input power supply. The internal switches and bandgap voltage will be immediately turned off.
Thermal Shutdown
The device has a thermal shutdown feature to protect the SC185 if the junction temperature exceeds 160C. During thermal shutdown, the on-chip power devices are disabled, floating the LX output. When the temperature drops by 10C, it will initial a soft start cycle to resume normal operation.
Over-Voltage Protection
In the event of a 15% over-voltage on the output, the PWM drive is disabled with the LX pin floating. Switching does not resume until the output voltage falls below the nominal Vout regulation voltage.
Under-Voltage Lockout
Under-Voltage Lockout (UVLO) is enabled when the input voltage drops below the UVLO threshold. This prevents the device from entering an ambiguous state in which regulation cannot be maintained. Hysteresis of approximately 300mV is included to prevent chattering near the threshold. When the AVIN voltage reaches back to the turn-on threshold and EN is high, the soft-start mode is resumed.
Soft-Start
The soft-start mode is activated after AVIN reaches it's UVLO voltage threshold and EN is set high to enable the part. A thermal shutdown event will also activate the soft start sequence. The Soft-start mode controls the slew-rate of the output voltage during startup thus limiting in-rush current on the input supply. During start up, the reference voltage for the error amplifier is clamped by the voltage on SS pin. The output voltage slew rate during soft start is determined by the value of the external capacitor connected to the SS pin and the internal 5A charging current. The SC185 requires a minimum soft-start time from enable to final regulation in the order of 200s, including the 50s enable delay. As a result the soft start capacitor, Css, should be higher than 1.5nF. During start up, the chip operates in forced PWM mode. The value of Css for the desired soft-start time, tss, can be determined by Equation 1.
t SS = CSS x 0.5V 5A (1)
Power Good
The power good (PGOOD) is an open-drain output. When the output voltage drops below 10% of nominal voltage, the PGOOD pin is pulled low after a 20s delay. During start-up, PGOOD will be asserted 1.8ms (typ.) after the output voltage reaches 90% of the final regulation voltage. The faults of over voltage, fold-back current limit mode and thermal shutdown will force PGOOD low after a 20s delay. When recovering from a fault, PGOOD will be asserted 1.8ms (typ.) after Vout reaches 90% of the final regulation voltage.
Enable
The EN input is used to enable or disable the device when the device is not in UVLO. When EN is low (grounded), the device enters shutdown mode and consumes less than 1A of current. In shutdown mode, the device tri-states the LX pin and pulls down the SS pin. The EN pin has a 500k internal pull-down resistor. This resistor is switched
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The SC185 is capable of starting up into a pre-biased
(c) 2010 Semtech Corp.
SC185
Applications Information (continued)
in circuit whenever the EN pin is below its threshold, or when the device is in under voltage lockout and AVIN exceeds 0.8V. When the device is enabled, it takes about 50s for the internal circuitry wake up and begin the softstart up sequence. value of 1H to 2.2H with output ceramic capacitors of 44F or higher capacitance. Lower inductance should be considered in applications where faster transient response is required. More output capacitance will reduce the output deviation for a particular load transient. When using low inductance, the maximum peak inductor current at any condition (normal operation and start up) can not exceed 5A which is the guaranteed minimum current limit. The saturation current rating of the inductor needs to be at least larger than the peak inductor current which is the maximum output current plus half of inductor ripple current.
Operation Mode Selection
The MODE input is used to select between forced PWM and automatic PSAVE modes. When the MODE pin is held high, the device operates in forced continuous PWM mode regardless of the output load condition. When the MODE pin is held low (grounded), the device is permitted to operate in Power Save mode (PSAVE). The MODE pin can be changed on-the-fly. When the MODE pin is switched from low to high, the device will transition to forced continuous PWM mode immediately. When the MODE pin is switched from high to low, and the load current is below the PSAVE entry level, the device will transition to PSAVE mode after 64 clock cycles. The MODE pin has a 500k internal pull-down resistor. This resistor is switched in circuit whenever the MODE pin is below its threshold, or when the device is in under voltage lockout but AVIN exceeds 0.8V.
100% Duty-Cycle Operation
SC185 is capable of operating at 100% duty-cycle. When the difference between input voltage to output voltage is less than the minimum dropout voltage, the PMOS switch is completely on, operating in 100% duty-cycle. The minimum dropout voltage is the output current multiplied by the on-resistance of the internal PMOS switch and the DC-resistance of the inductor when PMOS switch is on continuously.
Output L-C filter Selection
SC185 has fixed internal loop-gain compensation. It is optimized for X5R or X7R ceramic output capacitors and an output L-C filter corner frequency of less than 34KHz. The output L-C corner frequency can be determined by Equation 2.
fC = 1 2 L COUT
(2)
In general, the inductor is chosen to set the inductor ripple current to approximately 30% of the maximum output current. It is recommended to use a typical inductor
(c) 2010 Semtech Corp. 15 www.semtech.com
SC185
Applications Information (continued)
PCB Layout Considerations
The layout diagram in Figure 2 shows a recommended top-layer PCB for the SC185 and supporting components. Figure 3 shows the bottom layer for this PCB. Fundamental layout rules must be followed since the layout is critical for achieving the performance specified in the Electrical Characteristics table. Poor layout can degrade the performance of the DC-DC converter and can contribute to EMI problems, ground bounce, and resistive voltage losses. Poor regulation and instability can result. The following guidelines are recommended when developing a PCB layout: 1. The input capacitor, CIN should be placed as close to the PVIN and PGND pins as possible. This capacitor provides a low impedance loop for the pulsed currents present at the buck converter's input. Use short wide traces to connect as closely to the IC as possible. This will minimize EMI and input voltage ripple by localizing the high frequency current pulses. 2. Keep the LX pin traces as short as possible to minimize pickup of high frequency switching edges to other parts of the circuit. COUT and L should be connected as close as possible between the LX and PGND pins, with a direct return to the PGND pin from COUT. 3. Route the output voltage feedback/sense path away from the inductor and LX node to minimize noise and magnetic interference. 4. Use a ground plane referenced to the SC185 PGND pin. Use several vias to connect to the component side ground to further reduce noise and interference on sensitive circuit nodes. 5. If possible, minimize the resistance from the VOUT and PGND pins to the load. This will reduce the voltage drop on the ground plane and improve the load regulation. And it will also improve the overall efficiency by reducing the copper losses on the output and ground planes.
L VIN
VOUT
CIN
U1
GND
R1
C1
O D EN E d
CSS
Figure 2 -- Recommended PCB Layout (Top Layer)
PG oo
M
VIN
VOUT GND
GND
Figure 3 -- Bottom Layer Detail
(c) 2010 Semtech Corp.
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COUT
GND
A
D
B
DIM
A A1 A2 b D D1 E E1 e L N aaa bbb
DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX
.024 .002 (.006) .007 .009 .012 .114 .118 .122 .061 .067 .071 .114 .118 .122 .061 .067 .071 .020 BSC .012 .016 .020 16 .003 .004 .020 .000 0.60 0.05 (0.152) 0.18 0.23 0.30 2.90 3.00 3.10 1.55 1.70 1.80 2.90 3.00 3.10 1.55 1.70 1.80 0.50 BSC 0.30 0.40 0.50 16 0.08 0.10 0.50 0.00
SC185
Outline Drawing - 3x3 MLPQ-UT16
A D B
PIN 1 INDICATOR (LASER MARK)
E
DIM
A A2
A A1
DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX
.024 .002 (.006) .007 .009 .012 .114 .118 .122 .061 .067 .071 .114 .118 D1 .122 .061 .067 .071 .020 BSC .012 .016 .020 16 .003 .004 .020 .000
2 1 N
PIN 1 INDICATOR (LASER MARK)
E
aaa C
A2 A aaa C A1 D1 e/2 LxN E/2 E1
2 1 N
C
SEATING PLANE
b D D1 A1 E E1 e L N aaa bbb
E1
- A2 0.60 0.05 (0.152) SEATING 0.18 0.23 0.30 PLANE 2.90 3.00 3.10 C 1.55 1.70 1.80 2.90 3.00 3.10 1.55 1.70 1.80 e/2 0.50 BSC 0.30 0.40 0.50 LxN 16 E/2 0.08 0.10 0.50 0.00
e D/2
NOTES: 1. 2. 3. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DAP IS 1.90 x 1.90mm.
bxN bbb CAB
e D/2
NOTES:
bxN bbb CAB
Land Pattern - 3x3 MLPQ-UT16
1. 2. 3.
R
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.
H DAP IS 1.90 x 1.90mm.
DIM
(C) K G Z
DIMENSIONS INCHES MILLIMETERS
(.114) .083 .067 .067 .020 .006 .012 .031 .146 (2.90) 2.10 1.70 1.70 0.50 0.15 0.30 0.80 3.70
Y X P
C G H K P R X Y Z
NOTES: 1. 2. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET.
3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD SHALL BE CONNECTED TO A SYSTEM GROUND PLANE. FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR FUNCTIONAL PERFORMANCE OF THE DEVICE.
(c) 2010 Semtech Corp.
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SC185
(c) Semtech 2010 All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Semtech assumes no responsibility or liability whatsoever for any failure or unexpected operation resulting from misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified range. SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN SOLELY AT THE CUSTOMER'S OWN RISK. Should a customer purchase or use Semtech products for any such unauthorized application, the customer shall indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney fees which could arise.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805) 498-2111 Fax: (805) 498-3804 www.semtech.com
(c) 2010 Semtech Corp.
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